1. Field of the Invention
The present invention relates to an encoding and decoding apparatus for encoding of data variable bit length generated with a variable bit length coding method such as a DCT (discrete cosine transform) coding method or the like into a series of data of a predetermined number of bits, and for decoding the series of data into the data of variable bit length.
2. Description of the Prior Art
As one an example of high efficiency coding methods for compressing data of digital image signals, a two-dimensional DCT discrete cosine transform (DCT) coding method has been known. The two-dimensional DCT converts a block of a digital image signal, for example, a block of 8.times.8 in size, into coefficient data in accordance with a particular equation so as to remove a redundant component of the digital image signal. The coefficient data is distributed two-dimensionally, that is, in the horizontal and vertical directions. In both directions, the values of low frequency components are large, while the values of the high frequency components are very small. By processing such coefficient data with a variable length coding method such as run-length Huffman encoding, the amount of data to be transferred can be significantly compressed.
Variable length data where the number of bits differs in each of the sampled data, such as data which is obtained with the Huffman coding method, is not suitable for a coding process of an error correction scheme. Such variable bit length data should be converted into data whose number of bits n is constant (for example, n=8). Conventionally, variable length data is converted into serial data and then the serial variable length data is observed so as to detect a delimitation of each code.
In the conventional method for processing data in the bit serial manner, when the number of bits is n, the clock frequency should be n times the sampling frequency of output data. Thus, a high speed circuit which operates at a clock frequency n times the sampling frequency is required.